
FAA20 Embedded NEXCOM Vocoder
Board Manual
This manual has been prepared for the Federal Aviation Administration.
FA100-00107 (March 2004) – Rev 1.0.0 Page 63
Table 13: BIT Command Parameters
BITNAME ATTRIBUTES* DESCRIPTION
LED1 RW, SWC LED #1 (red). Typically indicates peak audio events.
LED2 RW, SWC LED #2 (yellow). Typically indicates audio activity.
LED3 RW, SWC LED #3 (green). Typically indicates truncated timing
mode.
LED4 RW, SWC LED #4 (red). Typically indicates errors or sample
add/drop events.
LED5 RW, SWC LED #5 (yellow). Typically indicates vocoder activity.
LED6 RW, SWC LED #6 (green). Typically indicates FAA20 runtime
status.
LPCM RW, SWC PCM Timing Master. When set, configures the FAA20
to drive the PCM clock and framing signals.
Note: While the BIT command will directly control the
associated signal direction, other timing dependent
FAA20 functions are not updated by the BIT
command. Therefore, the preferred control method for
PCM master timing is SW1.
LCVM RW, SWC Nibble Timing Master. When set, configures the
FAA20 to drive the nibble clock and framing signals.
Note: While the BIT command will directly control the
associated signal direction, other timing dependent
FAA20 functions are not updated by the BIT
command. Therefore, the preferred control method for
PCM master timing is SW2
LFSD RW, SWC Local Decoder Frame Sync Control. When LCVM=1,
this bit controls the decoder frame sync signal, FMDE.
LFSE RW, SWC Local Encoder Frame Sync Control. When LCVM=1,
this bit controls the encoder frame sync signal, FMEN.
PWDN RW Codec Power Down Control. When set, it powers
down the codec.
LOOP RW Codec External Loop Control. When set, the codec
loops received audio out the transmit port.
Note: When this bit is set, any output provided by the
internal mixer is summed with the looped back input
signal.
TRUN RW, SWC Codec Truncated Timing Control. When set, the
codec sample rate is set to 6.67 ksps.
WDOG RW, SWC Watch Dog Tickle Control. Toggling of this bit keeps
the watchdog from resetting the processor.
XFSD RO External Decoder Frame Sync Bit. This read-only bit
dis plays the current state of the decoder frame sync
signal, FMDE.
XFSE RO External Encoder Frame Sync Bit. This read-only bit
displays the current state of the encoder frame sync
signal, FMEN.
RUN RW, SWC Vocoder Run Status Signal. When set, indicates that
the encoder and/or decoder process is executing.
Note: For all operational modes except the TEST
mode, this bit is software controlled.
DDAT RW, CL, RSVD DDAT Signal Control Bit (DTMF Data). Reserved for
future use.
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