
FAA20 Embedded NEXCOM Vocoder
Board Manual
This manual has been prepared for the Federal Aviation Administration.
FA100-00107 (March 2004) – Rev 1.0.0 Page 35
Figure 15: FAA20 Hardware Block Diagram
The nibble interface is supported via a CPLD. The nibble data sampled
with the nibble clock and passed through a double-buffered latch. Data is
transferred out on the rising edge of the nibble clock and transferred in on
the falling edge of the nibble clock. Many of the vocoder discrete control
signals are also sampled by the nibble clock.
The FAA20 includes two different programmable logic devices (PLD): a
CPLD device (Atmel ATF1508) and a combo memory/PLD device (ST
Microelectronics PSD835). The nibble and PCM interface logic is
contained in the CPLD. The address decoding logic and the codec clock
divider circuit is contained in the combo device.
The FAA20 includes a dual port universal asynchronous
receiver/transmitter (UART) device to support two external RS-232 terminal
interfaces.
The UART and PLD devices are located in the DSP IO memory space.
The flash memory is accessed through the DSP data memory space.
DSP
TMS320C5416
122.88 MHz
CODEC
PCM3500
OSC
-or-
DIV6
4.096M or
3.413M
MCU
I/O
512 KB
+32 KB
SWITCHES LEDS
TLC16752
Programmable Logic
(PSD835G & ATF1508)
NIBCLK (9.6K typ)
ADDRESS/DATA
Data/Clock/Sync
Vocoder Discrete
I/O Controls
COM1
Nibbles/Clock/Sync
Data/
Clock/
Sync
OpAmp
Filters
COM2
DB9
1/8”
Jacks
DIN
DIN
(analog)
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